356 static constexpr u32 compo_cnt = 15;
375 return v_0000 * t.v_0000 + 4 * v_0001 * t.v_0001 + 4 * v_0002 * t.v_0002
376 + 6 * v_0011 * t.v_0011 + 12 * v_0012 * t.v_0012 + 6 * v_0022 * t.v_0022
377 + 4 * v_0111 * t.v_0111 + 12 * v_0112 * t.v_0112 + 12 * v_0122 * t.v_0122
378 + 4 * v_0222 * t.v_0222 + v_1111 * t.v_1111 + 4 * v_1112 * t.v_1112
379 + 6 * v_1122 * t.v_1122 + 4 * v_1222 * t.v_1222 + v_2222 * t.v_2222;
384 v_0000 * t.v_000 + 3 * v_0001 * t.v_001 + 3 * v_0002 * t.v_002
385 + 3 * v_0011 * t.v_011 + 6 * v_0012 * t.v_012 + 3 * v_0022 * t.v_022
386 + v_0111 * t.v_111 + 3 * v_0112 * t.v_112 + 3 * v_0122 * t.v_122
388 v_0001 * t.v_000 + 3 * v_0011 * t.v_001 + 3 * v_0012 * t.v_002
389 + 3 * v_0111 * t.v_011 + 6 * v_0112 * t.v_012 + 3 * v_0122 * t.v_022
390 + v_1111 * t.v_111 + 3 * v_1112 * t.v_112 + 3 * v_1122 * t.v_122
392 v_0002 * t.v_000 + 3 * v_0012 * t.v_001 + 3 * v_0022 * t.v_002
393 + 3 * v_0112 * t.v_011 + 6 * v_0122 * t.v_012 + 3 * v_0222 * t.v_022
394 + v_1112 * t.v_111 + 3 * v_1122 * t.v_112 + 3 * v_1222 * t.v_122
401 v_0000 * t.v_00 + 2 * v_0001 * t.v_01 + 2 * v_0002 * t.v_02 + v_0011 * t.v_11
402 + 2 * v_0012 * t.v_12 + v_0022 * t.v_22,
403 v_0001 * t.v_00 + 2 * v_0011 * t.v_01 + 2 * v_0012 * t.v_02 + v_0111 * t.v_11
404 + 2 * v_0112 * t.v_12 + v_0122 * t.v_22,
405 v_0002 * t.v_00 + 2 * v_0012 * t.v_01 + 2 * v_0022 * t.v_02 + v_0112 * t.v_11
406 + 2 * v_0122 * t.v_12 + v_0222 * t.v_22,
407 v_0011 * t.v_00 + 2 * v_0111 * t.v_01 + 2 * v_0112 * t.v_02 + v_1111 * t.v_11
408 + 2 * v_1112 * t.v_12 + v_1122 * t.v_22,
409 v_0012 * t.v_00 + 2 * v_0112 * t.v_01 + 2 * v_0122 * t.v_02 + v_1112 * t.v_11
410 + 2 * v_1122 * t.v_12 + v_1222 * t.v_22,
411 v_0022 * t.v_00 + 2 * v_0122 * t.v_01 + 2 * v_0222 * t.v_02 + v_1122 * t.v_11
412 + 2 * v_1222 * t.v_12 + v_2222 * t.v_22};
417 v_0000 * t.v_0 + v_0001 * t.v_1 + v_0002 * t.v_2,
418 v_0001 * t.v_0 + v_0011 * t.v_1 + v_0012 * t.v_2,
419 v_0002 * t.v_0 + v_0012 * t.v_1 + v_0022 * t.v_2,
420 v_0011 * t.v_0 + v_0111 * t.v_1 + v_0112 * t.v_2,
421 v_0012 * t.v_0 + v_0112 * t.v_1 + v_0122 * t.v_2,
422 v_0022 * t.v_0 + v_0122 * t.v_1 + v_0222 * t.v_2,
423 v_0111 * t.v_0 + v_1111 * t.v_1 + v_1112 * t.v_2,
424 v_0112 * t.v_0 + v_1112 * t.v_1 + v_1122 * t.v_2,
425 v_0122 * t.v_0 + v_1122 * t.v_1 + v_1222 * t.v_2,
426 v_0222 * t.v_0 + v_1222 * t.v_1 + v_2222 * t.v_2};
490 v_0000 += other.v_0000;
491 v_0001 += other.v_0001;
492 v_0002 += other.v_0002;
493 v_0011 += other.v_0011;
494 v_0012 += other.v_0012;
495 v_0022 += other.v_0022;
496 v_0111 += other.v_0111;
497 v_0112 += other.v_0112;
498 v_0122 += other.v_0122;
499 v_0222 += other.v_0222;
500 v_1111 += other.v_1111;
501 v_1112 += other.v_1112;
502 v_1122 += other.v_1122;
503 v_1222 += other.v_1222;
504 v_2222 += other.v_2222;
548 inline void store(Tacc &&acc,
u32 offset)
const {
549 acc[offset + 0] = v_0000;
550 acc[offset + 1] = v_0001;
551 acc[offset + 2] = v_0002;
552 acc[offset + 3] = v_0011;
553 acc[offset + 4] = v_0012;
554 acc[offset + 5] = v_0022;
555 acc[offset + 6] = v_0111;
556 acc[offset + 7] = v_0112;
557 acc[offset + 8] = v_0122;
558 acc[offset + 9] = v_0222;
559 acc[offset + 10] = v_1111;
560 acc[offset + 11] = v_1112;
561 acc[offset + 12] = v_1122;
562 acc[offset + 13] = v_1222;
563 acc[offset + 14] = v_2222;
591 static constexpr u32 compo_cnt = 21;
616 return v_00000 * t.v_00000 + 5 * v_00001 * t.v_00001 + 5 * v_00002 * t.v_00002
617 + 10 * v_00011 * t.v_00011 + 20 * v_00012 * t.v_00012 + 10 * v_00022 * t.v_00022
618 + 10 * v_00111 * t.v_00111 + 30 * v_00112 * t.v_00112 + 30 * v_00122 * t.v_00122
619 + 10 * v_00222 * t.v_00222 + 5 * v_01111 * t.v_01111 + 20 * v_01112 * t.v_01112
620 + 30 * v_01122 * t.v_01122 + 20 * v_01222 * t.v_01222 + 5 * v_02222 * t.v_02222
621 + v_11111 * t.v_11111
623 * (v_11112 * t.v_11112 + 2 * v_11122 * t.v_11122 + 2 * v_11222 * t.v_11222
624 + v_12222 * t.v_12222)
625 + v_22222 * t.v_22222;
630 v_00000 * t.v_0000 + 4 * v_00001 * t.v_0001 + 4 * v_00002 * t.v_0002
631 + 6 * v_00011 * t.v_0011 + 12 * v_00012 * t.v_0012 + 6 * v_00022 * t.v_0022
632 + 4 * v_00111 * t.v_0111 + 12 * v_00112 * t.v_0112 + 12 * v_00122 * t.v_0122
633 + 4 * v_00222 * t.v_0222 + v_01111 * t.v_1111 + 4 * v_01112 * t.v_1112
634 + 6 * v_01122 * t.v_1122 + 4 * v_01222 * t.v_1222 + v_02222 * t.v_2222,
635 v_00001 * t.v_0000 + 4 * v_00011 * t.v_0001 + 4 * v_00012 * t.v_0002
636 + 6 * v_00111 * t.v_0011 + 12 * v_00112 * t.v_0012 + 6 * v_00122 * t.v_0022
637 + 4 * v_01111 * t.v_0111 + 12 * v_01112 * t.v_0112 + 12 * v_01122 * t.v_0122
638 + 4 * v_01222 * t.v_0222 + v_11111 * t.v_1111 + 4 * v_11112 * t.v_1112
639 + 6 * v_11122 * t.v_1122 + 4 * v_11222 * t.v_1222 + v_12222 * t.v_2222,
640 v_00002 * t.v_0000 + 4 * v_00012 * t.v_0001 + 4 * v_00022 * t.v_0002
641 + 6 * v_00112 * t.v_0011 + 12 * v_00122 * t.v_0012 + 6 * v_00222 * t.v_0022
642 + 4 * v_01112 * t.v_0111 + 12 * v_01122 * t.v_0112 + 12 * v_01222 * t.v_0122
643 + 4 * v_02222 * t.v_0222 + v_11112 * t.v_1111 + 4 * v_11122 * t.v_1112
644 + 6 * v_11222 * t.v_1122 + 4 * v_12222 * t.v_1222 + v_22222 * t.v_2222};
649 v_00000 * t.v_000 + 3 * v_00001 * t.v_001 + 3 * v_00002 * t.v_002
650 + 3 * v_00011 * t.v_011 + 6 * v_00012 * t.v_012 + 3 * v_00022 * t.v_022
651 + v_00111 * t.v_111 + 3 * v_00112 * t.v_112 + 3 * v_00122 * t.v_122
653 v_00001 * t.v_000 + 3 * v_00011 * t.v_001 + 3 * v_00012 * t.v_002
654 + 3 * v_00111 * t.v_011 + 6 * v_00112 * t.v_012 + 3 * v_00122 * t.v_022
655 + v_01111 * t.v_111 + 3 * v_01112 * t.v_112 + 3 * v_01122 * t.v_122
657 v_00002 * t.v_000 + 3 * v_00012 * t.v_001 + 3 * v_00022 * t.v_002
658 + 3 * v_00112 * t.v_011 + 6 * v_00122 * t.v_012 + 3 * v_00222 * t.v_022
659 + v_01112 * t.v_111 + 3 * v_01122 * t.v_112 + 3 * v_01222 * t.v_122
661 v_00011 * t.v_000 + 3 * v_00111 * t.v_001 + 3 * v_00112 * t.v_002
662 + 3 * v_01111 * t.v_011 + 6 * v_01112 * t.v_012 + 3 * v_01122 * t.v_022
663 + v_11111 * t.v_111 + 3 * v_11112 * t.v_112 + 3 * v_11122 * t.v_122
665 v_00012 * t.v_000 + 3 * v_00112 * t.v_001 + 3 * v_00122 * t.v_002
666 + 3 * v_01112 * t.v_011 + 6 * v_01122 * t.v_012 + 3 * v_01222 * t.v_022
667 + v_11112 * t.v_111 + 3 * v_11122 * t.v_112 + 3 * v_11222 * t.v_122
669 v_00022 * t.v_000 + 3 * v_00122 * t.v_001 + 3 * v_00222 * t.v_002
670 + 3 * v_01122 * t.v_011 + 6 * v_01222 * t.v_012 + 3 * v_02222 * t.v_022
671 + v_11122 * t.v_111 + 3 * v_11222 * t.v_112 + 3 * v_12222 * t.v_122
672 + v_22222 * t.v_222};
677 v_00000 * t.v_00 + 2 * v_00001 * t.v_01 + 2 * v_00002 * t.v_02 + v_00011 * t.v_11
678 + 2 * v_00012 * t.v_12 + v_00022 * t.v_22,
679 v_00001 * t.v_00 + 2 * v_00011 * t.v_01 + 2 * v_00012 * t.v_02 + v_00111 * t.v_11
680 + 2 * v_00112 * t.v_12 + v_00122 * t.v_22,
681 v_00002 * t.v_00 + 2 * v_00012 * t.v_01 + 2 * v_00022 * t.v_02 + v_00112 * t.v_11
682 + 2 * v_00122 * t.v_12 + v_00222 * t.v_22,
683 v_00011 * t.v_00 + 2 * v_00111 * t.v_01 + 2 * v_00112 * t.v_02 + v_01111 * t.v_11
684 + 2 * v_01112 * t.v_12 + v_01122 * t.v_22,
685 v_00012 * t.v_00 + 2 * v_00112 * t.v_01 + 2 * v_00122 * t.v_02 + v_01112 * t.v_11
686 + 2 * v_01122 * t.v_12 + v_01222 * t.v_22,
687 v_00022 * t.v_00 + 2 * v_00122 * t.v_01 + 2 * v_00222 * t.v_02 + v_01122 * t.v_11
688 + 2 * v_01222 * t.v_12 + v_02222 * t.v_22,
689 v_00111 * t.v_00 + 2 * v_01111 * t.v_01 + 2 * v_01112 * t.v_02 + v_11111 * t.v_11
690 + 2 * v_11112 * t.v_12 + v_11122 * t.v_22,
691 v_00112 * t.v_00 + 2 * v_01112 * t.v_01 + 2 * v_01122 * t.v_02 + v_11112 * t.v_11
692 + 2 * v_11122 * t.v_12 + v_11222 * t.v_22,
693 v_00122 * t.v_00 + 2 * v_01122 * t.v_01 + 2 * v_01222 * t.v_02 + v_11122 * t.v_11
694 + 2 * v_11222 * t.v_12 + v_12222 * t.v_22,
695 v_00222 * t.v_00 + 2 * v_01222 * t.v_01 + 2 * v_02222 * t.v_02 + v_11222 * t.v_11
696 + 2 * v_12222 * t.v_12 + v_22222 * t.v_22};
702 v_00000 * t.v_0 + v_00001 * t.v_1 + v_00002 * t.v_2,
703 v_00001 * t.v_0 + v_00011 * t.v_1 + v_00012 * t.v_2,
704 v_00002 * t.v_0 + v_00012 * t.v_1 + v_00022 * t.v_2,
705 v_00011 * t.v_0 + v_00111 * t.v_1 + v_00112 * t.v_2,
706 v_00012 * t.v_0 + v_00112 * t.v_1 + v_00122 * t.v_2,
707 v_00022 * t.v_0 + v_00122 * t.v_1 + v_00222 * t.v_2,
708 v_00111 * t.v_0 + v_01111 * t.v_1 + v_01112 * t.v_2,
709 v_00112 * t.v_0 + v_01112 * t.v_1 + v_01122 * t.v_2,
710 v_00122 * t.v_0 + v_01122 * t.v_1 + v_01222 * t.v_2,
711 v_00222 * t.v_0 + v_01222 * t.v_1 + v_02222 * t.v_2,
712 v_01111 * t.v_0 + v_11111 * t.v_1 + v_11112 * t.v_2,
713 v_01112 * t.v_0 + v_11112 * t.v_1 + v_11122 * t.v_2,
714 v_01122 * t.v_0 + v_11122 * t.v_1 + v_11222 * t.v_2,
715 v_01222 * t.v_0 + v_11222 * t.v_1 + v_12222 * t.v_2,
716 v_02222 * t.v_0 + v_12222 * t.v_1 + v_22222 * t.v_2};
720 return SymTensor3d_5<T>{v_00000 * scal, v_00001 * scal, v_00002 * scal, v_00011 * scal,
721 v_00012 * scal, v_00022 * scal, v_00111 * scal, v_00112 * scal,
722 v_00122 * scal, v_00222 * scal, v_01111 * scal, v_01112 * scal,
723 v_01122 * scal, v_01222 * scal, v_02222 * scal, v_11111 * scal,
724 v_11112 * scal, v_11122 * scal, v_11222 * scal, v_12222 * scal,
756 return SymTensor3d_5<T>{v_00000 * scal, v_00001 * scal, v_00002 * scal, v_00011 * scal,
757 v_00012 * scal, v_00022 * scal, v_00111 * scal, v_00112 * scal,
758 v_00122 * scal, v_00222 * scal, v_01111 * scal, v_01112 * scal,
759 v_01122 * scal, v_01222 * scal, v_02222 * scal, v_11111 * scal,
760 v_11112 * scal, v_11122 * scal, v_11222 * scal, v_12222 * scal,
766 v_00000 += other.v_00000;
767 v_00001 += other.v_00001;
768 v_00002 += other.v_00002;
769 v_00011 += other.v_00011;
770 v_00012 += other.v_00012;
771 v_00022 += other.v_00022;
772 v_00111 += other.v_00111;
773 v_00112 += other.v_00112;
774 v_00122 += other.v_00122;
775 v_00222 += other.v_00222;
776 v_01111 += other.v_01111;
777 v_01112 += other.v_01112;
778 v_01122 += other.v_01122;
779 v_01222 += other.v_01222;
780 v_02222 += other.v_02222;
781 v_11111 += other.v_11111;
782 v_11112 += other.v_11112;
783 v_11122 += other.v_11122;
784 v_11222 += other.v_11222;
785 v_12222 += other.v_12222;
786 v_22222 += other.v_22222;
793 v_00000 + t2.v_00000, v_00001 + t2.v_00001, v_00002 + t2.v_00002,
794 v_00011 + t2.v_00011, v_00012 + t2.v_00012, v_00022 + t2.v_00022,
795 v_00111 + t2.v_00111, v_00112 + t2.v_00112, v_00122 + t2.v_00122,
796 v_00222 + t2.v_00222, v_01111 + t2.v_01111, v_01112 + t2.v_01112,
797 v_01122 + t2.v_01122, v_01222 + t2.v_01222, v_02222 + t2.v_02222,
798 v_11111 + t2.v_11111, v_11112 + t2.v_11112, v_11122 + t2.v_11122,
799 v_11222 + t2.v_11222, v_12222 + t2.v_12222, v_22222 + t2.v_22222};
804 v_00000 - t2.v_00000, v_00001 - t2.v_00001, v_00002 - t2.v_00002,
805 v_00011 - t2.v_00011, v_00012 - t2.v_00012, v_00022 - t2.v_00022,
806 v_00111 - t2.v_00111, v_00112 - t2.v_00112, v_00122 - t2.v_00122,
807 v_00222 - t2.v_00222, v_01111 - t2.v_01111, v_01112 - t2.v_01112,
808 v_01122 - t2.v_01122, v_01222 - t2.v_01222, v_02222 - t2.v_02222,
809 v_11111 - t2.v_11111, v_11112 - t2.v_11112, v_11122 - t2.v_11122,
810 v_11222 - t2.v_11222, v_12222 - t2.v_12222, v_22222 - t2.v_22222};
814 inline void store(Tacc &&acc,
u32 offset)
const {
815 acc[offset + 0] = v_00000;
816 acc[offset + 1] = v_00001;
817 acc[offset + 2] = v_00002;
818 acc[offset + 3] = v_00011;
819 acc[offset + 4] = v_00012;
820 acc[offset + 5] = v_00022;
821 acc[offset + 6] = v_00111;
822 acc[offset + 7] = v_00112;
823 acc[offset + 8] = v_00122;
824 acc[offset + 9] = v_00222;
825 acc[offset + 10] = v_01111;
826 acc[offset + 11] = v_01112;
827 acc[offset + 12] = v_01122;
828 acc[offset + 13] = v_01222;
829 acc[offset + 14] = v_02222;
830 acc[offset + 15] = v_11111;
831 acc[offset + 16] = v_11112;
832 acc[offset + 17] = v_11122;
833 acc[offset + 18] = v_11222;
834 acc[offset + 19] = v_12222;
835 acc[offset + 20] = v_22222;
841 acc[offset + 3], acc[offset + 4], acc[offset + 5],
842 acc[offset + 6], acc[offset + 7], acc[offset + 8],
843 acc[offset + 9], acc[offset + 10], acc[offset + 11],
844 acc[offset + 12], acc[offset + 13], acc[offset + 14],
845 acc[offset + 15], acc[offset + 16], acc[offset + 17],
846 acc[offset + 18], acc[offset + 19], acc[offset + 20]};